Design of Improved Error Amplifier to Improve System Transient Response

“The in-depth development of portable consumer Electronic products has increasingly higher requirements for power supplies. Current-mode DC-DC converters have the advantages of wide input range, high conversion efficiency, and large output power. They are widely used in portable electronics such as smart phones and PDAs. In the product. Due to the continuous enrichment of the functions of these mobile devices, the dynamic range of the load current is required to be larger and larger, which puts forward higher requirements on the stability of the power supply.

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The in-depth development of portable consumer electronic products has increasingly higher requirements for power supplies. Current-mode DC-DC converters have the advantages of wide input range, high conversion efficiency, and large output power. They are widely used in portable electronics such as smart phones and PDAs. In the product. Due to the continuous enrichment of the functions of these mobile devices, the dynamic range of the load current is required to be larger and larger, which puts forward higher requirements on the stability of the power supply.

In recent years, many solutions to improve the current mode DC-DC transient response have been proposed. For example, the literature proposes to introduce new zeros and poles in the compensation circuit to offset the zeros and poles of the control loop. Although the converter in the article obtained sufficient phase margin, this idea has not been experimentally verified. The literature proposes a zero-pole tracking frequency compensation for linear regulators, but due to different control strategies, this method is not suitable for pulse width modulation (PWM) control loops. The literature proposes a digital control scheme, but the cost of designing the analog-to-digital conversion part of the chip is relatively high. This paper proposes a novel control strategy on the basis of analyzing the stability of the current mode Buck DC-DC loop. A sampling circuit is used to sample the Inductor current, and the obtained value is compared with a series of reference voltages. The obtained comparison result controls the error amplifier output stage and the compensation resistor. In this way, the main pole and main zero of the system are dynamically adjusted with the load current.

1 Current mode Buck type DC-DC loop stability analysis

Judging from the topological structure of Buck DC-DC in Figure 1, there is an LC filter network between the input voltage Vin and the output voltage Vout.Assuming that the inductance and capacitance are ideal, the transfer function of the filter network is obtained

From equation (2), it can be seen that the LC filter network has conjugate double poles. When the signal is small, the current flowing through the filter will cause a 180° phase shift at the conjugate double pole, which will cause the system to oscillate.

DC-DC control modes are divided into voltage mode and current mode. The voltage mode control method is suitable for high-frequency systems with good noise immunity. But the disadvantage of the voltage mode control method is that the loop compensation is complicated and the transient response of the system is poor. The current mode control method adds a current control loop to the original voltage control loop to realize dual-loop control. A sampling circuit is used to sample the peak value of the inductor current, and the sampled result is compared with the compensation end of the error amplifier. The comparison result is used to adjust the duty cycle of the switching signal to achieve a stable output of the system. Since the adjustment signal does not pass through the LC filter, the trouble caused by the conjugate double pole of the LC filter is avoided.

Through the small-signal modeling of Figure 1, it is concluded that under the premise of ignoring the parasitic effect of the output capacitance, to make the system output stable, a pole and a zero must appear in the compensation module, where the pole is as close to the origin as possible, and the zero is used for Compensation is located at the pole of the output stage, so that the entire system becomes a stable single-pole system. The compensation network composed of error amplifier and resistor capacitor shown in Figure 2 can achieve this requirement. Figure 2(b) shows the small signal model of Figure 2(a).

Among them, r0 is the output impedance of the error amplifier; RCCc is the compensation resistance and the compensation capacitor; AV is the open loop gain of the operational amplifier. After adding the compensation network, the frequency response curve of the system is shown in Figure 3. The error amplifier pushes ωp1 forward as the dominant pole. At the same time, a zero point ωz is introduced to compensate the phase margin lost at the secondary main pole, making the system a stable single-pole system. ωp2 is the secondary main pole at the output. Determined by load resistance and output resistance.

2 Improved error amplifier design

In the current-mode Buck DC-DC system, the error amplifier detects the output load change information as a feedback loop and reflects it in the system. From equation (4), the output impedance of the error amplifier is obtained, and the position of the main pole of the system is determined, thereby obtaining the transient response of the loop.

When the load current of the system is required to change in a large and fast range, the usually set zero and pole cannot be adjusted with the change of the load current, so that the bandwidth of the system is limited to a fixed value, which affects the transient of the system. State response. It is assumed that if the position of the pole and zero of the system is dynamically adjusted with the change of the load current, the phase margin of the system will be relatively fixed, thereby improving the transient response of the system under the change of the load current.